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Final Electrical Specifications
LT5502 400MHz Quadrature IF Demodulator with RSSI
January 2001
FEATURES
s s s s s s s s s s s
DESCRIPTIO
Single 1.8V to 5.25V Supply IF Frequency Range: 70MHz to 400MHz 84dB Limiting IF Gain 90dB Linear RSSI Range 7.7MHz Lowpass Output Filter Baseband I/Q Amplitude Imbalance: <0.7dB 4dB Noise Figure Low Supply Current: 25mA Outputs Biased Up While in Standby Shutdown Current: 1A 24-Lead Narrow SSOP Package
APPLICATIO S
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IEEE802.11 High Speed Wireless LAN Wireless Local Loop
The LT(R)5502 is a 70MHz to 400MHz monolithic integrated quadrature IF demodulator. It consists of an IF limiter, quadrature down mixers, integrated lowpass filters, and divide-by-two LO buffers. The demodulator provides all building blocks for demodulation of I and Q baseband signals with a single supply voltage of 1.8V to 5.25V. The IF limiter has 84dB small-signal gain, and a built-in receive signal strength indicator (RSSI) with over 90dB linear range. The input referred noise-spectral-density is 1.45nV/Hz, which is equivalent to a 4dB noise figure when the input is terminated with a 50 source. The integrated lowpass output filters act as antialiasing and pulse-shaping filters for demodulated I/Q-baseband signals. The 3dB cutoff frequency of the filters is about 7.7MHz. The VCO frequency is required to be twice the desired operating frequency to provide quadrature local oscillator (LO) signals to the mixers. The standby mode provides fast transient response to the receive mode with reduced supply current when the I/Q outputs are AC-coupled to a baseband chip.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
I/Q Output Swing, RSSI Output vs IF Input Power
2V C2 1F C3 22nF IF INPUT R1 240 IF + IF - 2XLO 2XLO INPUT 2XLO - LT5502 ENABLE EN GND
+
C1 1nF
1200
DIFFERENTIAL OUTPUT SWING (mVP-P)
VCC
1000
IOUT+ 90 IOUT- QOUT+ BASEBAND DIFFERENTIAL I/Q OUTPUTS
800
/2 0
600
QOUT- RSSI C4 1.8pF
5502 TA01a
400
200 -85
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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1.2 1.0
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RSSI OUTPUT (V)
0.8
0.6
0.4
0.2 -70 -55 -40 -25 -10 IF INPUT POWER (dBm) 5
5502 TA01b
1
LT5502
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW IOUT
+
Power Supply Voltage ............................................ 5.5V LO Input Power .................................................. 10dBm IF Input Power .................................................... 10dBm Operating Ambient Temperature (Note 2) ..............................-40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C Voltage on any Pin not to Exceed ............................. VCC
1 2 3 4 5 6 7 8 9
24 QOUT+ 23 QOUT- 22 VCC 21 GND 20 GND 19 2XLO+ 18 2XLO - 17 VCC 16 VCC 15 RSSI 14 GND 13 IFt -
ORDER PART NUMBER LT5502EGN
IOUT- GND VCC GND IF + IF - GND GND
EN 10 STBY 11 IFt + 12
GN PACKAGE 24-LEAD NARROW PLASTIC SSOP TJMAX = 150C, JA = 85C/W
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PIF = -50dBm, TA = 25C, unless otherwise noted. (Note 3)
SYMBOL IF Input fIF Frequency Range 3dB Limiting Sensitivity Noise Figure DC Common Mode Voltage Demodulator I/Q Output I/Q Output Voltage Swing I/Q Amplitude Mismatch I/Q Phase Mismatch Output Driving Capability DC Common Mode Voltage RSSI Linear Dynamic Range (Note 4) Output Impedance Output Voltage Output Voltage Output Voltage Slope Linearity Error Baseband Lowpass Filter 3dB Cutoff Frequency Group Delay Ripple PARAMETER
VCC = 3V, f2XLO = 570MHz, P2XLO = -10dBm, f IF = 280MHz,
MIN TYP 70 to 400 -79 MAX UNITS MHz dBm dB V mVP-P 0.7 dB DEG k 1.84 V dB k 0.54 1.2 V V mV/dB dB MHz ns
CONDITIONS
Terminated 50 Source
4 2.6
Differential
850 0.1 0.6
Differential; CMAX = 10pF
1.5
3dB Linearity Error Input = - 70dBm Input = 0dBm Input from -70dBm to 0dBm Input from -70dBm to 0dBm 0.27 0.8
90 3.8 0.41 1.01 8.7 1 7.7 16.4
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LT5502
ELECTRICAL CHARACTERISTICS
PIF = -50dBm, TA = 25C, unless otherwise noted. (Note 3)
SYMBOL 2XLO f2XLO P2XLO Power Supply VCC ICC IOFF Supply Voltage Supply Current Shutdown Current Standby Mode Current EN = High EN = Low; Standby = Low EN = Low; Standby = High 1.8 25 1 2.6 5.25 32 100 3.5 V mA A mA Frequency Range Input Power DC Common Mode Voltage -20 2.6 140 to 800 -5 MHz dBm V PARAMETER
VCC = 3V, f2XLO = 570MHz, P2XLO = -10dBm, f IF = 280MHz,
MIN TYP MAX UNITS
CONDITIONS
Note 1: Absolute Maximum Ratings are those values beyond which the life a device may be impaired. Note 2: Specifications over the -40C to 85C temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: Tests are performed as shown in the configuration of Figure 3. Note 4: Tests are performed as shown in the configuration of Figure 1 for IF input.
TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Current vs Temperature
36 TA = 85C 1200 fIF = 280MHz TA = 85C
32
SUPPLY CURRENT (mA)
DIFFERENTIAL OUTPUT SWING (mVP-P)
DIFFERENTIAL OUTPUT SWING (mVP-P)
28 TA = 25C 24
20
TA = -40C
16 1.8
2.5
4.5 SUPPLY VOLTAGE (V)
3.5
UW
5.5
5502 G01
(Note 3) I/Q Output Swing vs IF Input Power
1200 VCC = 3V fIF = 280MHz TA = 85C TA = 25C
I/Q Output Swing vs Temperature
1000 TA = 25C 800 TA = -40C 600
1000
800
600
TA = -40C
400
400 1.8
2.5
4.5 SUPPLY VOLTAGE (V)
3.5
5.5
5502 G02
200 -85
-70
-55 -40 -25 -10 IF INPUT POWER (dBm)
5
5502 G03
3
LT5502 TYPICAL PERFOR A CE CHARACTERISTICS (Note 3)
I/Q Output Swing vs IF Input Power
1200
DIFFERENTIAL OUTPUT SWING (mVP-P)
VCC = 3V TA = 25C fIF = 70MHz
1000
800 fIF = 280MHz 600 fIF = 400MHz 400
RSSI OUTPUT (V)
RSSI OUTPUT (V)
200 -85
-70
-40 -25 -10 IF INPUT POWER (dBm)
-55
RSSI Output Voltage vs VCC
1.2 fIF = 280MHz TA = 25C
INPUT SENSITIVITY (dBm)
INPUT SENSITIVITY (dBm)
1.0
RSSI OUTPUT (V)
0.8 VCC = 3V 0.6 VCC = 5.5V VCC = 1.8V 0.4
0.2 -85
-70
-40 -25 -10 IF INPUT POWER (dBm)
-55
LPF Frequency Response vs Baseband Frequency
5 0 TA = 85C GAIN RESPONSE (dB) -5
GROUP DELAY (ns)
VCC = 3V
GAIN RESPONSE (dB)
-10 -15 -20 -25 -30 -35 0
TA = 25C
TA = -40C
16 12 BASEBAND FREQUENCY (MHz)
4
8
4
UW
5
5502 G04
RSSI Output vs Temperature
1.2 VCC = 3V fIF = 280MHz 1.2
RSSI Output Voltage vs IF Frequency
VCC = 3V TA = 25C fIF = 280MHz
1.0
1.0
0.8 TA = 85C 0.6 TA = -40C TA = 25C 0.4
0.8 fIF = 70MHz 0.6
0.4 fIF = 400MHz 0.2 -85
0.2 -85
-70
-40 -25 -10 IF INPUT POWER (dBm)
-55
5
-70
-55 -40 -25 -10 IF INPUT POWER (dBm)
5
5502 G05
5502 G06
IF Input Sensitivity vs Temperature
-73 fIF = 280MHz
-73
IF Input Sensitivity vs IF Frequency
VCC = 3V
-75
-76 TA = 85C -79 TA = 25C -82 TA = -40C
-77 TA = 25C -79
TA = 85C
TA = -40C -81
5
-83 1.8
2.5
4.5 SUPPLY VOLTAGE (V)
3.5
-85
5.5
5502 G08
70 100
150 200 250 300 IF FREQUENCY (MHz)
350
400
5502 G07
5502 G09
LPF Group Delay vs Baseband Frequency
110 95 80 65 50 35 20 TA = 25C TA = 85C VCC = 3V
LPF Frequency Response vs VCC
5 0 -5 -10 -15 -20 -25 -30 50 70 VCC = 1.8V, 3V, 5.5V TA = 25C 110
TA = -40C
90
GROUP DELAY (ns)
20
5502 G10
0
4 8 12 16 BASEBAND FREQUENCY (MHz)
20
5502 G11
-35 0
16 12 BASEBAND FREQUENCY (MHz)
4
8
30 20
5502 G12
LT5502
PI FU CTIO S
IOUT+ (Pin 1): Positive Baseband Output Pin of I-Channel. The DC bias voltage is VCC - 1.16V. This pin should not be shorted to ground. IOUT- (Pin 2): Negative Baseband Input Pin of I-Channel. The DC bias voltage is VCC - 1.16V. This pin should not be shorted to ground. GND (Pins 3, 5, 8, 9, 14, 20, 21): Ground Pin. VCC (Pins 4, 16, 17, 22): Power Supply Pin. This pin should be decoupled using 1000pF and 0.1F capacitors. IF + (Pin 6): Positive IF Input Pin. The DC bias voltage is VCC - 0.4V. IF - (Pin 7): Negative IF Input Pin. The DC bias voltage is VCC - 0.4V. EN (Pin 10): Enable Pin. When the input voltage is higher than 0.9V or up to VCC, the circuit is completely turned on. When the input voltage is less than 0.7V or down to ground, the circuit is turned off except the part of the circuit associated with standby mode. STBY (Pin 11): Standby Pin. When the input voltage is higher than 0.9V or up to VCC, the circuit of standby mode is turned on to bias the I/Q buffers to desired quiescent voltage. When the input voltage is less than 0.7V or down to ground, it is turned off. IFt + (Pin 12): Interstage IF Positive Pin. The DC bias voltage is VCC - 0.25V. IFt - (Pin 13): Interstage IF Negative Pin. The DC bias voltage is VCC - 0.25V. RSSI (Pin 15): RSSI Output Pin. 2XLO - (Pin 18): Negative Carrier Input Pin. The inputsignal's frequency must be twice that of the desired demodulator LO frequency. The DC bias voltage is VCC - 0.4V. 2XLO + (Pin 19): Positive Carrier Input Pin. The inputsignal's frequency must be twice that of the desired demodulator LO frequency. The DC bias voltage is VCC - 0.4V. QOUT- (Pin 23): Negative Baseband Output Pin of the Q-Channel. The DC bias voltage is VCC - 1.16V. This pin should not be shorted to ground. QOUT+ (Pin 24): Positive Baseband Output Pin of the Q-Channel. The DC bias voltage is VCC - 1.16V. This pin should not be shorted to ground.
BLOCK DIAGRA
IF + IF -
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IFt+ 12
IFt- 13 I-MIXER LPF 1 2 LO BUFFERS DIVIDE 2 0/90 IOUT- 1 IOUT+
LIMITER 1
LIMITER 2
LPF 1
24 QOUT+ 23 QOUT- BIAS
RSSI
Q-MIXER
15 RSSI
19 2XLO +
18 2XLO -
10 EN
5502 BD
5
LT5502
APPLICATIO S I FOR ATIO
The LT5502 consists of the following sections: IF limiter, I/Q demodulators, quadrature LO carrier generator, integrated lowpass filters (LPFs), and bias circuitry. An IF signal is fed to the inputs of the IF limiter. The limited IF signal is then demodulated into I/Q baseband signals using the quadrature LO carriers that are generated from the divide-by-two circuit. The demodulated I/Q signals are passed through 5th order LPFs and buffered with an output driver. IF Limiter The IF limiter has 84dB small-signal gain with a frequency range of 70MHz to 400MHz. It consists of two cascaded stages of IF amplifiers/limiters. The differential outputs of the first stage are connected internally to the differential inputs of the second stage. An interstage filtering is possible in between (Pin 12 and Pin 13) with minimum offchip components. It can be a simple parallel LC tank circuit L1 and C8 as shown in Figure 3. The 22nF blocking capacitor, C19, is used for the proper operation of the internal DC offset canceling circuit. To achieve the best receiver sensitivity, a differential configuration at the IF input is recommended due to its better immunity to 2XLO signal coupling to the IF limiter. Otherwise, the 2XLO interference, presented at the IF inputs, may saturate the IF limiter and reduce the gain of the wanted IF signal. The receiver's 3dB input-limiting sensitivity will be affected correspondingly. The interstage bandpass filter will minimize both 2XLO feedthrough and the receiver's noise bandwidth. Therefore, the receiver's input sensitivity can be improved. Without the interstage filter, the second stage will be limited by the broadband noise amplified by the first stage. The noise bandwidth in this case can be as high as 500MHz. The 3dB input limiting sensitivity is about -79dBm at an IF frequency of 280MHz when terminated with 200 at the input. The differential IF input impedance is 2.2k. Therefore, a 240 resistor is used for R3 as shown in Figure 3. Using a bandpass filter with 50MHz bandwidth, the input sensitivity is improved to -86dBm.
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The 1:4 IF input transformer can also be replaced with a narrow band single-to-differential conversion circuit using three discreet elements as shown in Figure 1. Their nominal values are listed in Table 1. Due to the parasitics of the PCB, their values need to be compensated. The receiver's input sensitivity in this case is improved to -85dBm even without interstage filtering. The matching circuit is essentially a second order bandpass filter. Therefore, the requirement for the front-end channel-select filter can be eased too.
MATCHING NETWORK CS1 3.3pF IF INPUT CS2 3.3pF LSH 120nH TO IF -
5502 F01
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C5 22nF TO IF +
Figure 1. IF Input Matching Network at 280MHz Table 1. The Component Values of Matching Network LSH, CS1 and CS2
fIF (MHz) 70 100 150 200 250 300 350 400 LSH (nH) 642 422 256 176 130 101 80.4 66.0 CS1/CS2 (pF) 13.7 9.6 6.4 4.8 3.8 3.2 2.7 2.4
In an application where a lower input sensitivity is satisfactory, one of the IF inputs can be simply AC-terminated with a 50 resistor and the other AC-grounded. The input receiver's sensitivity is about - 76dBm at 280MHz in this case.
LT5502
APPLICATIO S I FOR ATIO
The receive signal strength indicator (RSSI) is built into the IF limiter. The input IF signal is detected in a current output proportional to the IF input power. The current outputs from two cascaded stages of IF amplifiers/limiters are summed and converted into the RSSI voltage. The RSSI output has an excellent linear range of 90dB. The characteristic of RSSI output voltage versus input IF power is independent of temperature and process variation. The nominal output impedance is 3.8k. An off-chip capacitor C7 is needed to reduce the RSSI voltage ripple. Its value can be determined using the following formula:
C7 1 F 760 * fIF
I/Q Demodulators The quadrature demodulators are double balanced mixers, down converting the limited IF signals from the IF Limiter into I/Q baseband signals. The quadrature LO carriers are obtained from the internal quadrature LO carrier generator. The nominal output voltage of differential I/Q baseband signals is about 850mVP-P. These magnitudes are well matched, and their phases are 90 apart. Quadrature LO Carrier Generator The quadrature LO carrier generator consists of a divideby-two circuit and LO buffers. An input signal (2XLO) with twice the desired LO carrier frequency is used as the clock for the divide-by-two circuit, producing the quadrature LO carriers for the demodulators. The outputs are buffered and then drive the down converting mixers. With a full differential approach, the quadrature LO carriers are well matched. Integrated Low Pass Filters The 5th order integrated lowpass filters are used for filtering the down converted baseband outputs for both the I-channel and the Q-channel. They serve as antialiasing and pulse-shaping filters. The I/Q filters are well
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matched in gain response and group delay. The 3dB corner frequency is 7.7MHz and the group delay ripple is 16.4ns. The I/Q differential outputs have output driving capability of 1.5k with maximum capacitive loading of 10pF. The outputs are internally biased at VCC -1.16V. Figure 2 shows the simplified output circuit schematic of I-channel or Q-channnel.
VCC
I-CHANNEL (OR Q-CHANNEL): DIFFERENTIAL SIGNALS FROM LPF
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IOUT+ (OR QOUT+) IOUT- (OR QOUT-)
+
200A
+
200A
-
-
5502 F02
Figure 2. Simplified Circuit Schematic of I-Channel (or Q-Channel) Outputs
The I/Q baseband outputs can be directly DC-coupled to the inputs of a baseband chip. For AC-coupled applications with large coupling capacitors, the STBY pin can be used to prebias the outputs to the desired quiescent voltage at much reduced current. This mode only draws 2.6mA. When the EN pin is then turned on, the chip is quickly switched to normal operating mode without long time constants due to charging or discharging the large coupling capacitors. Table 2 shows the logic of the EN pin and STBY pin. In both normal operating mode and standby mode, the maximum discharging current is about 200A, and the maximum charging current is more than 10mA.
Table 2. The logic of different operating modes
EN Low Low High STBY Low High Low or High Comments Shutdown Mode Standby Mode Normal Operation Mode
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LT5502
TYPICAL APPLICATIO S
IOUT+ IOUT- C9 1F VCC2 C24 10F VCC1 C25 10F QOUT+ QOUT- C20 1F R15 51.1k
R8 51.1k
R9 51.1k C10 1F
J2 IOUT
R7 49.9
C13 1F 6
7
+
U2 LT1809CS 4
3 C1 1F R6 2.55k C11 1F 1 2 3 4 5 6 7 8 9 10 11 12 IOUT+ IOUT- GND VCC GND IF + IF - GND GND EN STBY IFt + C2 1nF R12 C15 2.55k 1F QOUT+ QOUT- VCC GND GND 2XLO+ 2XLO - VCC VCC RSSI GND IFt - 24 23 22 21 20 19 18 17 16 15 14 13 C3 1nF
-
C12 1.8pF
2
R10 5.11k J1 IFIN T1 JTX-4-10T 6 1 R3 240 1:4 MINI-CIRCUIT
C5 22nF
R2 20k VCC2 1 = EN 2 = STBY C23 1F R1 20k
SW1
Figure 3. Evaluation Circuit Schematic With I/Q Output Buffers
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R14 51.1k C14 1F
3
7
+
U3 LT1809CS 6
C17 1F
R16 49.9
J3 QOUT
2
-
C16 1.8pF
4
U1 LT5502
R13 5.11k T2 JTX-4-10T R4 240 1 4:1 MINI-CIRCUIT 6 J4 2XLO
/2
RSSI C18 1F C4 1nF C7 1.8pF
L1 C8 C19 22nF IF INTERSTAGE R17 OPTIONAL CIRCUIT
5502 F02
LT5502
TYPICAL APPLICATIO S U
Figure 4.Component Side Silkscreen of Evaluation Board
Figure 5. Component Side Layout of Evaluation Board
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LT5502
TYPICAL APPLICATIO S U
Figure 6.Bottom Side Silkscreen of Evaluation Board
Figure 7. Bottom Side Layout of Evaluation Board
10
LT5502
PACKAGE DESCRIPTIO U
Dimensions in inches (millimeters) unless otherwise noted.
GN Package 24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.337 - 0.344* (8.560 - 8.738) 24 23 22 21 20 19 18 17 16 15 1413
0.033 (0.838) REF
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
1
23
4
56
7
8
9 10 11 12
0.015 0.004 x 45 (0.38 0.10) 0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0 - 8 TYP
0.053 - 0.068 (1.351 - 1.727)
0.004 - 0.0098 (0.102 - 0.249)
0.008 - 0.012 (0.203 - 0.305)
0.0250 (0.635) BSC
GN24 (SSOP) 1098
11
LT5502
TYPICAL APPLICATIO
Example: 2.4GHz to 2.5GHz Receiver Application (RX IF = 280MHz)
RX INPUT: 2.4GHz TO 2.5GHz
280MHz IF SAW BP FILTER 3.3pF RX FRONT END 1st LO, 2.12GHz TO 2.22GHz MAIN SYNTHESIZER
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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2V 0.1F 12 13 I MIXER 22nF 6 7 120nH LIMITER 1 LIMITER 2 0 LO BUFFER 90 Q MIXER 3.3pF LT5502 RSSI 15 18 3,5,8,9, 14,20,21 1nF 19 1nF f/2 LPF BUFFER Q 24 OUTPUTS 23 LPF BUFFER STBY EN 11 10 100pF VCC 4,16,17,22 I 1 OUTPUTS 2 BASEBAND PROCESSOR A/D A/D 1.8pF 30nH 2nd LO, 560MHz 2.7pF
5502 TA02
2.7pF 200 30nH
IF SYNTHESIZER
5502i LT/TP 0101 2K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 2001

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